Matteo Bruni : d3dx9: Add ps_1_4 instructions parsing to the shader assembler.

Alexandre Julliard julliard at winehq.org
Tue Jul 20 11:20:36 CDT 2010


Module: wine
Branch: master
Commit: 7c834e30d75c6593030aafca209d8cdf23d1c968
URL:    http://source.winehq.org/git/wine.git/?a=commit;h=7c834e30d75c6593030aafca209d8cdf23d1c968

Author: Matteo Bruni <matteo.mystral at gmail.com>
Date:   Tue Jul 20 15:01:16 2010 +0200

d3dx9: Add ps_1_4 instructions parsing to the shader assembler.

---

 dlls/d3dx9_36/asmshader.l        |    5 +++++
 dlls/d3dx9_36/asmshader.y        |   32 ++++++++++++++++++++++++++++++++
 dlls/d3dx9_36/asmutils.c         |   10 ++++++++++
 dlls/d3dx9_36/d3dx9_36_private.h |    5 +++++
 4 files changed, 52 insertions(+), 0 deletions(-)

diff --git a/dlls/d3dx9_36/asmshader.l b/dlls/d3dx9_36/asmshader.l
index f02cc9e..8929183 100644
--- a/dlls/d3dx9_36/asmshader.l
+++ b/dlls/d3dx9_36/asmshader.l
@@ -162,15 +162,20 @@ lit                     {return INSTR_LIT;          }
 mova                    {return INSTR_MOVA;         }
 
     /* Pixel shader only instructions   */
+cnd                     {return INSTR_CND;          }
 cmp                     {return INSTR_CMP;          }
 dp2add                  {return INSTR_DP2ADD;       }
+texcrd                  {return INSTR_TEXCRD;       }
 texkill                 {return INSTR_TEXKILL;      }
 texld                   {return INSTR_TEXLD;        }
+texdepth                {return INSTR_TEXDEPTH;     }
+bem                     {return INSTR_BEM;          }
 dsx                     {return INSTR_DSX;          }
 dsy                     {return INSTR_DSY;          }
 texldp                  {return INSTR_TEXLDP;       }
 texldb                  {return INSTR_TEXLDB;       }
 texldd                  {return INSTR_TEXLDD;       }
+phase                   {return INSTR_PHASE;        }
 
 {REG_TEMP}              {
                             asmshader_lval.regnum = atoi(yytext + 1);
diff --git a/dlls/d3dx9_36/asmshader.y b/dlls/d3dx9_36/asmshader.y
index 503af1d..3ed2128 100644
--- a/dlls/d3dx9_36/asmshader.y
+++ b/dlls/d3dx9_36/asmshader.y
@@ -148,15 +148,20 @@ void set_rel_reg(struct shader_reg *reg, struct rel_reg *rel) {
 %token INSTR_MOVA
 
 /* Pixel shader only instructions   */
+%token INSTR_CND
 %token INSTR_CMP
 %token INSTR_DP2ADD
+%token INSTR_TEXCRD
 %token INSTR_TEXKILL
 %token INSTR_TEXLD
+%token INSTR_TEXDEPTH
+%token INSTR_BEM
 %token INSTR_DSX
 %token INSTR_DSY
 %token INSTR_TEXLDP
 %token INSTR_TEXLDB
 %token INSTR_TEXLDD
+%token INSTR_PHASE
 
 /* Registers */
 %token <regnum> REG_TEMP
@@ -786,6 +791,11 @@ instruction:          INSTR_ADD omods dreg ',' sregs
                                 TRACE("MOVA\n");
                                 asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_MOVA, $2.mod, $2.shift, 0, &$3, &$5, 1);
                             }
+                    | INSTR_CND omods dreg ',' sregs
+                            {
+                                TRACE("CND\n");
+                                asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_CND, $2.mod, $2.shift, 0, &$3, &$5, 3);
+                            }
                     | INSTR_CMP omods dreg ',' sregs
                             {
                                 TRACE("CMP\n");
@@ -796,11 +806,22 @@ instruction:          INSTR_ADD omods dreg ',' sregs
                                 TRACE("DP2ADD\n");
                                 asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_DP2ADD, $2.mod, $2.shift, 0, &$3, &$5, 3);
                             }
+                    | INSTR_TEXCRD omods dreg ',' sregs
+                            {
+                                TRACE("TEXCRD\n");
+                                /* texcoord and texcrd share the same opcode */
+                                asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXCOORD, $2.mod, $2.shift, 0, &$3, &$5, 1);
+                            }
                     | INSTR_TEXKILL dreg
                             {
                                 TRACE("TEXKILL\n");
                                 asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXKILL, 0, 0, 0, &$2, 0, 0);
                             }
+                    | INSTR_TEXDEPTH omods dreg
+                            {
+                                TRACE("TEXDEPTH\n");
+                                asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXDEPTH, $2.mod, $2.shift, 0, &$3, 0, 0);
+                            }
                     | INSTR_TEXLD omods dreg ',' sregs
                             {
                                 TRACE("TEXLD\n");
@@ -822,6 +843,11 @@ instruction:          INSTR_ADD omods dreg ',' sregs
                                 TRACE("TEXLDB\n");
                                 asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXLDB, $2.mod, $2.shift, 0, &$3, &$5, 2);
                             }
+                    | INSTR_BEM omods dreg ',' sregs
+                            {
+                                TRACE("BEM\n");
+                                asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_BEM, $2.mod, $2.shift, 0, &$3, &$5, 2);
+                            }
                     | INSTR_DSX omods dreg ',' sregs
                             {
                                 TRACE("DSX\n");
@@ -837,6 +863,12 @@ instruction:          INSTR_ADD omods dreg ',' sregs
                                 TRACE("TEXLDD\n");
                                 asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXLDD, $2.mod, $2.shift, 0, &$3, &$5, 4);
                             }
+                    | INSTR_PHASE
+                            {
+                                TRACE("PHASE\n");
+                                asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_PHASE, 0, 0, 0, 0, 0, 0);
+                            }
+
 
 dreg:                 dreg_name rel_reg
                             {
diff --git a/dlls/d3dx9_36/asmutils.c b/dlls/d3dx9_36/asmutils.c
index 09b97ee..8f42207 100644
--- a/dlls/d3dx9_36/asmutils.c
+++ b/dlls/d3dx9_36/asmutils.c
@@ -201,12 +201,16 @@ DWORD d3d9_opcode(DWORD bwriter_opcode) {
         case BWRITERSIO_DEFB:        return D3DSIO_DEFB;
         case BWRITERSIO_DEFI:        return D3DSIO_DEFI;
 
+        case BWRITERSIO_TEXCOORD:    return D3DSIO_TEXCOORD;
         case BWRITERSIO_TEXKILL:     return D3DSIO_TEXKILL;
         case BWRITERSIO_TEX:         return D3DSIO_TEX;
         case BWRITERSIO_EXPP:        return D3DSIO_EXPP;
         case BWRITERSIO_LOGP:        return D3DSIO_LOGP;
+        case BWRITERSIO_CND:         return D3DSIO_CND;
         case BWRITERSIO_DEF:         return D3DSIO_DEF;
+        case BWRITERSIO_TEXDEPTH:    return D3DSIO_TEXDEPTH;
         case BWRITERSIO_CMP:         return D3DSIO_CMP;
+        case BWRITERSIO_BEM:         return D3DSIO_BEM;
         case BWRITERSIO_DP2ADD:      return D3DSIO_DP2ADD;
         case BWRITERSIO_DSX:         return D3DSIO_DSX;
         case BWRITERSIO_DSY:         return D3DSIO_DSY;
@@ -215,6 +219,7 @@ DWORD d3d9_opcode(DWORD bwriter_opcode) {
         case BWRITERSIO_TEXLDL:      return D3DSIO_TEXLDL;
         case BWRITERSIO_BREAKP:      return D3DSIO_BREAKP;
 
+        case BWRITERSIO_PHASE:       return D3DSIO_PHASE;
         case BWRITERSIO_COMMENT:     return D3DSIO_COMMENT;
         case BWRITERSIO_END:         return D3DSIO_END;
 
@@ -545,12 +550,16 @@ const char *debug_print_opcode(DWORD opcode) {
         case BWRITERSIO_MOVA:         return "mova";
         case BWRITERSIO_DEFB:         return "defb";
         case BWRITERSIO_DEFI:         return "defi";
+        case BWRITERSIO_TEXCOORD:     return "texcoord";
         case BWRITERSIO_TEXKILL:      return "texkill";
         case BWRITERSIO_TEX:          return "tex";
         case BWRITERSIO_EXPP:         return "expp";
         case BWRITERSIO_LOGP:         return "logp";
+        case BWRITERSIO_CND:          return "cnd";
         case BWRITERSIO_DEF:          return "def";
+        case BWRITERSIO_TEXDEPTH:     return "texdepth";
         case BWRITERSIO_CMP:          return "cmp";
+        case BWRITERSIO_BEM:          return "bem";
         case BWRITERSIO_DP2ADD:       return "dp2add";
         case BWRITERSIO_DSX:          return "dsx";
         case BWRITERSIO_DSY:          return "dsy";
@@ -558,6 +567,7 @@ const char *debug_print_opcode(DWORD opcode) {
         case BWRITERSIO_SETP:         return "setp";
         case BWRITERSIO_TEXLDL:       return "texldl";
         case BWRITERSIO_BREAKP:       return "breakp";
+        case BWRITERSIO_PHASE:        return "phase";
 
         case BWRITERSIO_TEXLDP:       return "texldp";
         case BWRITERSIO_TEXLDB:       return "texldb";
diff --git a/dlls/d3dx9_36/d3dx9_36_private.h b/dlls/d3dx9_36/d3dx9_36_private.h
index f366619..6e7d970 100644
--- a/dlls/d3dx9_36/d3dx9_36_private.h
+++ b/dlls/d3dx9_36/d3dx9_36_private.h
@@ -476,12 +476,16 @@ typedef enum _BWRITERSHADER_INSTRUCTION_OPCODE_TYPE {
     BWRITERSIO_DEFB,
     BWRITERSIO_DEFI,
 
+    BWRITERSIO_TEXCOORD,
     BWRITERSIO_TEXKILL,
     BWRITERSIO_TEX,
     BWRITERSIO_EXPP,
     BWRITERSIO_LOGP,
+    BWRITERSIO_CND,
     BWRITERSIO_DEF,
+    BWRITERSIO_TEXDEPTH,
     BWRITERSIO_CMP,
+    BWRITERSIO_BEM,
     BWRITERSIO_DP2ADD,
     BWRITERSIO_DSX,
     BWRITERSIO_DSY,
@@ -492,6 +496,7 @@ typedef enum _BWRITERSHADER_INSTRUCTION_OPCODE_TYPE {
     BWRITERSIO_TEXLDP,
     BWRITERSIO_TEXLDB,
 
+    BWRITERSIO_PHASE,
     BWRITERSIO_COMMENT,
     BWRITERSIO_END,
 } BWRITERSHADER_INSTRUCTION_OPCODE_TYPE;




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