=?UTF-8?Q?Andr=C3=A9=20Hentschel=20?=: winedbg: Add shift operators to ARM disassembler.
Alexandre Julliard
julliard at winehq.org
Wed Apr 18 13:04:13 CDT 2012
Module: wine
Branch: master
Commit: 6235e6fd44ca42f39ca85e80f4c1c886bb5ff7e2
URL: http://source.winehq.org/git/wine.git/?a=commit;h=6235e6fd44ca42f39ca85e80f4c1c886bb5ff7e2
Author: André Hentschel <nerv at dawncrow.de>
Date: Wed Apr 18 00:01:57 2012 +0200
winedbg: Add shift operators to ARM disassembler.
---
programs/winedbg/be_arm.c | 28 +++++++++++++++++++++++++---
1 files changed, 25 insertions(+), 3 deletions(-)
diff --git a/programs/winedbg/be_arm.c b/programs/winedbg/be_arm.c
index 93f12d6..670fd8a 100644
--- a/programs/winedbg/be_arm.c
+++ b/programs/winedbg/be_arm.c
@@ -62,6 +62,10 @@ static char const tbl_dataops[][4] = {
"mov", "bic", "mvn"
};
+static char const tbl_shifts[][4] = {
+ "lsl", "lsr", "asr", "ror"
+};
+
static char const tbl_hiops_t[][4] = {
"add", "cmp", "mov", "bx"
};
@@ -140,8 +144,16 @@ static UINT arm_disasm_dataprocessing(UINT inst)
if (immediate)
dbg_printf("%s, #%u", tbl_regs[get_nibble(inst, 4)],
ROR32(inst & 0xff, 2 * get_nibble(inst, 2)));
- else
+ else if (((inst >> 4) & 0xff) == 0x00) /* no shift */
dbg_printf("%s, %s", tbl_regs[get_nibble(inst, 4)], tbl_regs[get_nibble(inst, 0)]);
+ else if (((inst >> 4) & 0x09) == 0x01) /* register shift */
+ dbg_printf("%s, %s, %s %s", tbl_regs[get_nibble(inst, 4)], tbl_regs[get_nibble(inst, 0)],
+ tbl_shifts[(inst >> 5) & 0x03], tbl_regs[(inst >> 8) & 0x0f]);
+ else if (((inst >> 4) & 0x01) == 0x00) /* immediate shift */
+ dbg_printf("%s, %s, %s #%d", tbl_regs[get_nibble(inst, 4)], tbl_regs[get_nibble(inst, 0)],
+ tbl_shifts[(inst >> 5) & 0x03], (inst >> 7) & 0x1f);
+ else
+ return inst;
}
return 0;
}
@@ -165,15 +177,25 @@ static UINT arm_disasm_singletrans(UINT inst)
{
if (immediate)
dbg_printf("[%s, #%d]", tbl_regs[get_nibble(inst, 4)], offset);
- else
+ else if (((inst >> 4) & 0xff) == 0x00) /* no shift */
dbg_printf("[%s, %s]", tbl_regs[get_nibble(inst, 4)], tbl_regs[get_nibble(inst, 0)]);
+ else if (((inst >> 4) & 0x01) == 0x00) /* immediate shift (there's no register shift) */
+ dbg_printf("[%s, %s, %s #%d]", tbl_regs[get_nibble(inst, 4)], tbl_regs[get_nibble(inst, 0)],
+ tbl_shifts[(inst >> 5) & 0x03], (inst >> 7) & 0x1f);
+ else
+ return inst;
}
else
{
if (immediate)
dbg_printf("[%s], #%d", tbl_regs[get_nibble(inst, 4)], offset);
- else
+ else if (((inst >> 4) & 0xff) == 0x00) /* no shift */
dbg_printf("[%s], %s", tbl_regs[get_nibble(inst, 4)], tbl_regs[get_nibble(inst, 0)]);
+ else if (((inst >> 4) & 0x01) == 0x00) /* immediate shift (there's no register shift) */
+ dbg_printf("[%s], %s, %s #%d", tbl_regs[get_nibble(inst, 4)], tbl_regs[get_nibble(inst, 0)],
+ tbl_shifts[(inst >> 5) & 0x03], (inst >> 7) & 0x1f);
+ else
+ return inst;
}
return 0;
}
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