Makefiles: Be less verbose when performing make rules by only printing the command being executed and the source and/or target file.

[Eric Pouech]

Robert Shearman a écrit :
>
> The old behaviour can be turned back on by setting the VERBOSE 
> environment variable to "yes".

>  .s.o:
>  	$(AS) -o $@ $<
>  
>  $(MODULE): $(OBJS) Makefile.in
> -	$(RM) $@
> -	$(AR) $@ $(OBJS)
> -	$(RANLIB) $@
> +	@$(RM) $@
> +	@$(MAKERULE) '[AR] $@' $(AR) $@ $(OBJS)
> +	@$(MAKERULE) '[RANLIB] $@' $(RANLIB) $@
>   
we'll miss the echo for the $(RM) command in verbose mode
IMO, we should use here something like @$(MAKERULE) '' $(RM)... and 
handle the empty $1 in makerule

A+

-- 
Eric Pouech
"The problem with designing something completely foolproof is to underestimate the ingenuity of a complete idiot." (Douglas Adams)