PATCH: ppc interlocked functions, part 2

[Marcus Meissner]

Hi,

On SMP systems you need to specify an isync to flush the predicted branch
logic in some PowerPC models.

Ciao, Marcus

Changelog:
	Added isync to the interlocked functions.

Index: libs/port/interlocked.c
===================================================================
RCS file: /home/wine/wine/libs/port/interlocked.c,v
retrieving revision 1.2
diff -u -r1.2 interlocked.c
--- libs/port/interlocked.c	4 May 2003 02:26:53 -0000	1.2
+++ libs/port/interlocked.c	1 Jul 2003 17:09:35 -0000
@@ -112,6 +112,7 @@
         "      bne 1f\n"
         "      stwcx. %3,0,%2\n"
         "      bne- 0b\n"
+	"      isync\n"
         "1:    "
         : "=&r"(ret), "=&r"(scratch)
         : "r"(dest), "r"(xchg), "r"(compare)
@@ -129,6 +130,7 @@
         "      bne 1f\n"
         "      stwcx. %3,0,%2\n"
         "      bne- 0b\n"
+	"      isync\n"
         "1:    "
         : "=&r"(ret), "=&r"(scratch)
         : "r"(dest), "r"(xchg), "r"(compare)
@@ -145,6 +147,7 @@
         "      add %0, %2, %0\n"
         "      stwcx. %0, %3, %1\n"
         "      bne- 0b\n"
+	"      isync\n"
         : "=&r" (ret)
         : "r"(dest), "r"(incr), "r"(zero)
         : "cr0", "memory", "r0"
@@ -159,6 +162,7 @@
         "0:    lwarx %0,0,%1\n"
         "      stwcx. %2,0,%1\n"
         "      bne- 0b\n"
+	"      isync\n"
         : "=&r"(ret)
         : "r"(dest), "r"(val)
         : "cr0","memory","r0");
@@ -172,6 +176,7 @@
         "0:    lwarx %0,0,%1\n"
         "      stwcx. %2,0,%1\n"
         "      bne- 0b \n"
+	"      isync\n"
         : "=&r"(ret)
         : "r"(dest), "r"(val)
         : "cr0","memory","r0");
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