[2/3] d3dx9: Add <= ps_1_3 instruction parsing to the shader assembler.
Matteo Bruni
matteo.mystral at gmail.com
Wed Jul 21 10:16:47 CDT 2010
-------------- next part --------------
From 132f4f197ee3a7a1d1cc6da223dc432c144b9c96 Mon Sep 17 00:00:00 2001
From: Matteo Bruni <matteo.mystral at gmail.com>
Date: Wed, 21 Jul 2010 17:07:24 +0200
Subject: d3dx9: Add <= ps_1_3 instruction parsing to the shader assembler.
---
dlls/d3dx9_36/asmshader.l | 17 ++++++
dlls/d3dx9_36/asmshader.y | 102 ++++++++++++++++++++++++++++++++++++++
dlls/d3dx9_36/asmutils.c | 30 +++++++++++
dlls/d3dx9_36/d3dx9_36_private.h | 15 ++++++
4 files changed, 164 insertions(+), 0 deletions(-)
diff --git a/dlls/d3dx9_36/asmshader.l b/dlls/d3dx9_36/asmshader.l
index 8929183..385449e 100644
--- a/dlls/d3dx9_36/asmshader.l
+++ b/dlls/d3dx9_36/asmshader.l
@@ -165,9 +165,26 @@ mova {return INSTR_MOVA; }
cnd {return INSTR_CND; }
cmp {return INSTR_CMP; }
dp2add {return INSTR_DP2ADD; }
+texcoord {return INSTR_TEXCOORD; }
texcrd {return INSTR_TEXCRD; }
texkill {return INSTR_TEXKILL; }
+tex {return INSTR_TEX; }
texld {return INSTR_TEXLD; }
+texbem {return INSTR_TEXBEM; }
+texbeml {return INSTR_TEXBEML; }
+texreg2ar {return INSTR_TEXREG2AR; }
+texreg2gb {return INSTR_TEXREG2GB; }
+texreg2rgb {return INSTR_TEXREG2RGB; }
+texm3x2pad {return INSTR_TEXM3x2PAD; }
+texm3x2tex {return INSTR_TEXM3x2TEX; }
+texm3x3pad {return INSTR_TEXM3x3PAD; }
+texm3x3spec {return INSTR_TEXM3x3SPEC; }
+texm3x3vspec {return INSTR_TEXM3x3VSPEC; }
+texm3x3tex {return INSTR_TEXM3x3TEX; }
+texdp3tex {return INSTR_TEXDP3TEX; }
+texm3x2depth {return INSTR_TEXM3x2DEPTH; }
+texdp3 {return INSTR_TEXDP3; }
+texm3x3 {return INSTR_TEXM3x3; }
texdepth {return INSTR_TEXDEPTH; }
bem {return INSTR_BEM; }
dsx {return INSTR_DSX; }
diff --git a/dlls/d3dx9_36/asmshader.y b/dlls/d3dx9_36/asmshader.y
index a961af4..587f19f 100644
--- a/dlls/d3dx9_36/asmshader.y
+++ b/dlls/d3dx9_36/asmshader.y
@@ -151,9 +151,26 @@ void set_rel_reg(struct shader_reg *reg, struct rel_reg *rel) {
%token INSTR_CND
%token INSTR_CMP
%token INSTR_DP2ADD
+%token INSTR_TEXCOORD
%token INSTR_TEXCRD
%token INSTR_TEXKILL
+%token INSTR_TEX
%token INSTR_TEXLD
+%token INSTR_TEXBEM
+%token INSTR_TEXBEML
+%token INSTR_TEXREG2AR
+%token INSTR_TEXREG2GB
+%token INSTR_TEXREG2RGB
+%token INSTR_TEXM3x2PAD
+%token INSTR_TEXM3x2TEX
+%token INSTR_TEXM3x3PAD
+%token INSTR_TEXM3x3SPEC
+%token INSTR_TEXM3x3VSPEC
+%token INSTR_TEXM3x3TEX
+%token INSTR_TEXDP3TEX
+%token INSTR_TEXM3x2DEPTH
+%token INSTR_TEXDP3
+%token INSTR_TEXM3x3
%token INSTR_TEXDEPTH
%token INSTR_BEM
%token INSTR_DSX
@@ -810,6 +827,11 @@ instruction: INSTR_ADD omods dreg ',' sregs
TRACE("DP2ADD\n");
asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_DP2ADD, $2.mod, $2.shift, 0, &$3, &$5, 3);
}
+ | INSTR_TEXCOORD omods dreg
+ {
+ TRACE("TEXCOORD\n");
+ asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXCOORD, $2.mod, $2.shift, 0, &$3, 0, 0);
+ }
| INSTR_TEXCRD omods dreg ',' sregs
{
TRACE("TEXCRD\n");
@@ -821,6 +843,11 @@ instruction: INSTR_ADD omods dreg ',' sregs
TRACE("TEXKILL\n");
asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXKILL, 0, 0, 0, &$2, 0, 0);
}
+ | INSTR_TEX omods dreg
+ {
+ TRACE("TEX\n");
+ asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEX, $2.mod, $2.shift, 0, &$3, 0, 0);
+ }
| INSTR_TEXDEPTH omods dreg
{
TRACE("TEXDEPTH\n");
@@ -847,6 +874,81 @@ instruction: INSTR_ADD omods dreg ',' sregs
TRACE("TEXLDB\n");
asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXLDB, $2.mod, $2.shift, 0, &$3, &$5, 2);
}
+ | INSTR_TEXBEM omods dreg ',' sregs
+ {
+ TRACE("TEXBEM\n");
+ asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXBEM, $2.mod, $2.shift, 0, &$3, &$5, 1);
+ }
+ | INSTR_TEXBEML omods dreg ',' sregs
+ {
+ TRACE("TEXBEML\n");
+ asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXBEML, $2.mod, $2.shift, 0, &$3, &$5, 1);
+ }
+ | INSTR_TEXREG2AR omods dreg ',' sregs
+ {
+ TRACE("TEXREG2AR\n");
+ asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXREG2AR, $2.mod, $2.shift, 0, &$3, &$5, 1);
+ }
+ | INSTR_TEXREG2GB omods dreg ',' sregs
+ {
+ TRACE("TEXREG2GB\n");
+ asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXREG2GB, $2.mod, $2.shift, 0, &$3, &$5, 1);
+ }
+ | INSTR_TEXREG2RGB omods dreg ',' sregs
+ {
+ TRACE("TEXREG2RGB\n");
+ asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXREG2RGB, $2.mod, $2.shift, 0, &$3, &$5, 1);
+ }
+ | INSTR_TEXM3x2PAD omods dreg ',' sregs
+ {
+ TRACE("TEXM3x2PAD\n");
+ asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXM3x2PAD, $2.mod, $2.shift, 0, &$3, &$5, 1);
+ }
+ | INSTR_TEXM3x3PAD omods dreg ',' sregs
+ {
+ TRACE("INSTR_TEXM3x3PAD\n");
+ asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXM3x3PAD, $2.mod, $2.shift, 0, &$3, &$5, 1);
+ }
+ | INSTR_TEXM3x3SPEC omods dreg ',' sregs
+ {
+ TRACE("TEXM3x3SPEC\n");
+ asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXM3x3SPEC, $2.mod, $2.shift, 0, &$3, &$5, 2);
+ }
+ | INSTR_TEXM3x3VSPEC omods dreg ',' sregs
+ {
+ TRACE("TEXM3x3VSPEC\n");
+ asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXM3x3VSPEC, $2.mod, $2.shift, 0, &$3, &$5, 1);
+ }
+ | INSTR_TEXM3x3TEX omods dreg ',' sregs
+ {
+ TRACE("TEXM3x3TEX\n");
+ asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXM3x3TEX, $2.mod, $2.shift, 0, &$3, &$5, 1);
+ }
+ | INSTR_TEXDP3TEX omods dreg ',' sregs
+ {
+ TRACE("TEXDP3TEX\n");
+ asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXDP3TEX, $2.mod, $2.shift, 0, &$3, &$5, 1);
+ }
+ | INSTR_TEXM3x2DEPTH omods dreg ',' sregs
+ {
+ TRACE("TEXM3x2DEPTH\n");
+ asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXM3x2DEPTH, $2.mod, $2.shift, 0, &$3, &$5, 1);
+ }
+ | INSTR_TEXM3x2TEX omods dreg ',' sregs
+ {
+ TRACE("TEXM3x2TEX\n");
+ asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXM3x2TEX, $2.mod, $2.shift, 0, &$3, &$5, 1);
+ }
+ | INSTR_TEXDP3 omods dreg ',' sregs
+ {
+ TRACE("TEXDP3\n");
+ asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXDP3, $2.mod, $2.shift, 0, &$3, &$5, 1);
+ }
+ | INSTR_TEXM3x3 omods dreg ',' sregs
+ {
+ TRACE("TEXM3x3\n");
+ asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXM3x3, $2.mod, $2.shift, 0, &$3, &$5, 1);
+ }
| INSTR_BEM omods dreg ',' sregs
{
TRACE("BEM\n");
diff --git a/dlls/d3dx9_36/asmutils.c b/dlls/d3dx9_36/asmutils.c
index 8f42207..968cb84 100644
--- a/dlls/d3dx9_36/asmutils.c
+++ b/dlls/d3dx9_36/asmutils.c
@@ -204,10 +204,25 @@ DWORD d3d9_opcode(DWORD bwriter_opcode) {
case BWRITERSIO_TEXCOORD: return D3DSIO_TEXCOORD;
case BWRITERSIO_TEXKILL: return D3DSIO_TEXKILL;
case BWRITERSIO_TEX: return D3DSIO_TEX;
+ case BWRITERSIO_TEXBEM: return D3DSIO_TEXBEM;
+ case BWRITERSIO_TEXBEML: return D3DSIO_TEXBEML;
+ case BWRITERSIO_TEXREG2AR: return D3DSIO_TEXREG2AR;
+ case BWRITERSIO_TEXREG2GB: return D3DSIO_TEXREG2GB;
+ case BWRITERSIO_TEXM3x2PAD: return D3DSIO_TEXM3x2PAD;
+ case BWRITERSIO_TEXM3x2TEX: return D3DSIO_TEXM3x2TEX;
+ case BWRITERSIO_TEXM3x3PAD: return D3DSIO_TEXM3x3PAD;
+ case BWRITERSIO_TEXM3x3TEX: return D3DSIO_TEXM3x3TEX;
+ case BWRITERSIO_TEXM3x3SPEC: return D3DSIO_TEXM3x3SPEC;
+ case BWRITERSIO_TEXM3x3VSPEC:return D3DSIO_TEXM3x3VSPEC;
case BWRITERSIO_EXPP: return D3DSIO_EXPP;
case BWRITERSIO_LOGP: return D3DSIO_LOGP;
case BWRITERSIO_CND: return D3DSIO_CND;
case BWRITERSIO_DEF: return D3DSIO_DEF;
+ case BWRITERSIO_TEXREG2RGB: return D3DSIO_TEXREG2RGB;
+ case BWRITERSIO_TEXDP3TEX: return D3DSIO_TEXDP3TEX;
+ case BWRITERSIO_TEXM3x2DEPTH:return D3DSIO_TEXM3x2DEPTH;
+ case BWRITERSIO_TEXDP3: return D3DSIO_TEXDP3;
+ case BWRITERSIO_TEXM3x3: return D3DSIO_TEXM3x3;
case BWRITERSIO_TEXDEPTH: return D3DSIO_TEXDEPTH;
case BWRITERSIO_CMP: return D3DSIO_CMP;
case BWRITERSIO_BEM: return D3DSIO_BEM;
@@ -553,10 +568,25 @@ const char *debug_print_opcode(DWORD opcode) {
case BWRITERSIO_TEXCOORD: return "texcoord";
case BWRITERSIO_TEXKILL: return "texkill";
case BWRITERSIO_TEX: return "tex";
+ case BWRITERSIO_TEXBEM: return "texbem";
+ case BWRITERSIO_TEXBEML: return "texbeml";
+ case BWRITERSIO_TEXREG2AR: return "texreg2ar";
+ case BWRITERSIO_TEXREG2GB: return "texreg2gb";
+ case BWRITERSIO_TEXM3x2PAD: return "texm3x2pad";
+ case BWRITERSIO_TEXM3x2TEX: return "texm3x2tex";
+ case BWRITERSIO_TEXM3x3PAD: return "texm3x3pad";
+ case BWRITERSIO_TEXM3x3TEX: return "texm3x3tex";
+ case BWRITERSIO_TEXM3x3SPEC: return "texm3x3vspec";
+ case BWRITERSIO_TEXM3x3VSPEC: return "texm3x3vspec";
case BWRITERSIO_EXPP: return "expp";
case BWRITERSIO_LOGP: return "logp";
case BWRITERSIO_CND: return "cnd";
case BWRITERSIO_DEF: return "def";
+ case BWRITERSIO_TEXREG2RGB: return "texreg2rgb";
+ case BWRITERSIO_TEXDP3TEX: return "texdp3tex";
+ case BWRITERSIO_TEXM3x2DEPTH: return "texm3x2depth";
+ case BWRITERSIO_TEXDP3: return "texdp3";
+ case BWRITERSIO_TEXM3x3: return "texm3x3";
case BWRITERSIO_TEXDEPTH: return "texdepth";
case BWRITERSIO_CMP: return "cmp";
case BWRITERSIO_BEM: return "bem";
diff --git a/dlls/d3dx9_36/d3dx9_36_private.h b/dlls/d3dx9_36/d3dx9_36_private.h
index 4be1d58..c4fa468 100644
--- a/dlls/d3dx9_36/d3dx9_36_private.h
+++ b/dlls/d3dx9_36/d3dx9_36_private.h
@@ -480,10 +480,25 @@ typedef enum _BWRITERSHADER_INSTRUCTION_OPCODE_TYPE {
BWRITERSIO_TEXCOORD,
BWRITERSIO_TEXKILL,
BWRITERSIO_TEX,
+ BWRITERSIO_TEXBEM,
+ BWRITERSIO_TEXBEML,
+ BWRITERSIO_TEXREG2AR,
+ BWRITERSIO_TEXREG2GB,
+ BWRITERSIO_TEXM3x2PAD,
+ BWRITERSIO_TEXM3x2TEX,
+ BWRITERSIO_TEXM3x3PAD,
+ BWRITERSIO_TEXM3x3TEX,
+ BWRITERSIO_TEXM3x3SPEC,
+ BWRITERSIO_TEXM3x3VSPEC,
BWRITERSIO_EXPP,
BWRITERSIO_LOGP,
BWRITERSIO_CND,
BWRITERSIO_DEF,
+ BWRITERSIO_TEXREG2RGB,
+ BWRITERSIO_TEXDP3TEX,
+ BWRITERSIO_TEXM3x2DEPTH,
+ BWRITERSIO_TEXDP3,
+ BWRITERSIO_TEXM3x3,
BWRITERSIO_TEXDEPTH,
BWRITERSIO_CMP,
BWRITERSIO_BEM,
--
1.7.1
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