winebuild: Improved position independent code generation
André Hentschel
nerv at dawncrow.de
Sun Aug 6 07:31:09 CDT 2017
Android only accepts proper position independent binaries, but until now we generated code which led to a TEXTREL flag
Signed-off-by: André Hentschel <nerv at dawncrow.de>
---
tools/winebuild/import.c | 34 ++++++++++++++--------------------
tools/winebuild/spec32.c | 4 ++--
2 files changed, 16 insertions(+), 22 deletions(-)
diff --git a/tools/winebuild/import.c b/tools/winebuild/import.c
index e7bad72..43dfa50 100644
--- a/tools/winebuild/import.c
+++ b/tools/winebuild/import.c
@@ -668,15 +668,14 @@ static void output_import_thunk( const char *name, const char *table, int pos )
output( "1:\t.long %s+%u-(1b+4)\n", table, pos );
break;
case CPU_ARM64:
- output( "\tadr x9, 1f\n" );
- output( "\tldur x9, [x9, #0]\n" );
+ output( "\tadrp x9, %s\n", table );
+ output( "\tadd x9, x9, #:lo12:%s\n", table );
if (pos & 0xf000) output( "\tadd x9, x9, #%u\n", pos & 0xf000 );
if (pos & 0x0f00) output( "\tadd x9, x9, #%u\n", pos & 0x0f00 );
if (pos & 0x00f0) output( "\tadd x9, x9, #%u\n", pos & 0x00f0 );
if (pos & 0x000f) output( "\tadd x9, x9, #%u\n", pos & 0x000f );
output( "\tldur x9, [x9, #0]\n" );
output( "\tbr x9\n" );
- output( "1:\t.quad %s\n", table );
break;
case CPU_POWERPC:
output( "\tmr %s, %s\n", ppc_reg(0), ppc_reg(31) );
@@ -980,8 +979,8 @@ static void output_delayed_import_thunks( const DLLSPEC *spec )
case CPU_ARM64:
output( "\tstp x29, x30, [sp,#-16]!\n" );
output( "\tmov x29, sp\n" );
- output( "\tadr x9, 1f\n" );
- output( "\tldur x9, [x9, #0]\n" );
+ output( "\tadrp x9, %s\n", asm_name("__wine_spec_delay_load") );
+ output( "\tadd x9, x9, #:lo12:%s\n", asm_name("__wine_spec_delay_load") );
output( "\tblr x9\n" );
output( "\tmov x9, x0\n" );
output( "\tldp x29, x30, [sp],#16\n" );
@@ -990,7 +989,6 @@ static void output_delayed_import_thunks( const DLLSPEC *spec )
output( "\tldp x4, x5, [sp,#48]\n" );
output( "\tldp x6, x7, [sp],#80\n" );
output( "\tbr x9\n" ); /* or "ret x9" */
- output( "1:\t.quad %s\n", asm_name("__wine_spec_delay_load") );
break;
case CPU_POWERPC:
if (target_platform == PLATFORM_APPLE) extra_stack_storage = 56;
@@ -1089,10 +1087,8 @@ static void output_delayed_import_thunks( const DLLSPEC *spec )
output( "\tmul x1, x0, x1\n" );
output( "\tmov x0, x1\n" );
output( "\tadd x0, x0, #%d\n", j );
- output( "\tadr x9, 1f\n" );
- output( "\tldur x9, [x9, #0]\n" );
+ output( "\tadr x9, %s\n", asm_name("__wine_delay_load_asm") );
output( "\tbr x9\n" );
- output( "1:\t.quad %s\n", asm_name("__wine_delay_load_asm") );
break;
case CPU_POWERPC:
switch(target_platform)
@@ -1281,21 +1277,19 @@ void output_stubs( DLLSPEC *spec )
else output( "\t.long %u\n", odp->ordinal );
break;
case CPU_ARM64:
- output( "\tadr x0, 2f\n" );
- output( "\tldur x0, [x0, #0]\n" );
- output( "\tadr x1, 2f+8\n" );
- output( "\tldur x1, [x1, #0]\n" );
- output( "\tadr x2, 1f\n" );
- output( "\tldur x2, [x2, #0]\n" );
- output( "\tblr x2\n" );
- output( "1:\t.quad %s\n", asm_name("__wine_spec_unimplemented_stub") );
- output( "2:\t.quad %s\n", asm_name("__wine_spec_file_name") );
+ output( "\tadrp x0, %s\n", asm_name("__wine_spec_file_name") );
+ output( "\tadd x0, x0, #:lo12:%s\n", asm_name("__wine_spec_file_name") );
if (exp_name)
{
- output( "\t.quad .L%s_string\n", name );
+ output( "\tadrp x1, .L%s_string\n", name );
+ output( "\tadd x1, x1, #:lo12:.L%s_string\n", name );
count++;
}
- else output( "\t.quad %u\n", odp->ordinal );
+ else
+ output( "\tmov x1, %u\n", odp->ordinal );
+ output( "\tadrp x2, %s\n", asm_name("__wine_spec_unimplemented_stub") );
+ output( "\tadd x2, x2, #:lo12:%s\n", asm_name("__wine_spec_unimplemented_stub") );
+ output( "\tblr x2\n" );
break;
default:
assert(0);
diff --git a/tools/winebuild/spec32.c b/tools/winebuild/spec32.c
index 4a01238..83a48b6 100644
--- a/tools/winebuild/spec32.c
+++ b/tools/winebuild/spec32.c
@@ -257,14 +257,14 @@ static void output_relay_debug( DLLSPEC *spec )
output( "\tmov w1, #%u\n", (flags << 24) );
if (args) output( "\tadd w1, w1, #%u\n", (args << 16) );
if (i - spec->base) output( "\tadd w1, w1, #%u\n", i - spec->base );
- output( "\tldr x0, 1f\n");
+ output( "\tadrp x0, .L__wine_spec_relay_descr\n");
+ output( "\tadd x0, x0, #:lo12:.L__wine_spec_relay_descr\n");
output( "\tldr x3, [x0, #8]\n");
output( "\tblr x3\n");
output( "\tadd SP, SP, #16\n" );
output( "\tldp x29, x30, [SP], #16\n" );
if (args) output( "\tadd SP, SP, #%u\n", 8 * ((min(args, 8) + 1) & 0xe) );
output( "\tret\n");
- output( "\t1: .quad .L__wine_spec_relay_descr\n");
break;
case CPU_x86_64:
--
2.7.4
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