[Bug 46187] Windows PowerShell Core 6.2 Preview 2 for ARM32 crashes due to unhandled trap_no 0 (write watch access causes SIGSEGV)

[wine-bugs at winehq.org]

https://bugs.winehq.org/show_bug.cgi?id=46187

--- Comment #1 from Anastasius Focht <focht at gmx.net> ---
Hello folks,

for completeness here is the corresponding change for Linux kernel arch arm64,
AArch32 mode:

https://github.com/torvalds/linux/commit/9141300a5884b57cea6d32c4e3fd16a337cfc99a

v3.16-rc1+

--- snip ---
arm64: Provide read/write fault information in compat signal handlers

For AArch32, bit 11 (WnR) of the FSR/ESR register is set when the fault
was caused by a write access and applications like Qemu rely on such
information being provided in sigcontext. This patch introduces the
ESR_EL1 tracking for the arm64 kernel faults and sets bit 11 accordingly
in compat sigcontext.

Signed-off-by: Catalin Marinas <catalin.marinas at arm.com>
--- snip ---

https://github.com/torvalds/linux/blob/9141300a5884b57cea6d32c4e3fd16a337cfc99a/arch/arm64/kernel/signal32.c#L481

--- snip ---
#define FSR_WRITE_SHIFT    (11)

...

static int compat_setup_sigframe(struct compat_sigframe __user *sf,
                 struct pt_regs *regs, sigset_t *set)
{
    struct compat_aux_sigframe __user *aux;
    int err = 0;

    __put_user_error(regs->regs[0], &sf->uc.uc_mcontext.arm_r0, err);
    __put_user_error(regs->regs[1], &sf->uc.uc_mcontext.arm_r1, err);
    __put_user_error(regs->regs[2], &sf->uc.uc_mcontext.arm_r2, err);
    __put_user_error(regs->regs[3], &sf->uc.uc_mcontext.arm_r3, err);
    __put_user_error(regs->regs[4], &sf->uc.uc_mcontext.arm_r4, err);
    __put_user_error(regs->regs[5], &sf->uc.uc_mcontext.arm_r5, err);
    __put_user_error(regs->regs[6], &sf->uc.uc_mcontext.arm_r6, err);
    __put_user_error(regs->regs[7], &sf->uc.uc_mcontext.arm_r7, err);
    __put_user_error(regs->regs[8], &sf->uc.uc_mcontext.arm_r8, err);
    __put_user_error(regs->regs[9], &sf->uc.uc_mcontext.arm_r9, err);
    __put_user_error(regs->regs[10], &sf->uc.uc_mcontext.arm_r10, err);
    __put_user_error(regs->regs[11], &sf->uc.uc_mcontext.arm_fp, err);
    __put_user_error(regs->regs[12], &sf->uc.uc_mcontext.arm_ip, err);
    __put_user_error(regs->compat_sp, &sf->uc.uc_mcontext.arm_sp, err);
    __put_user_error(regs->compat_lr, &sf->uc.uc_mcontext.arm_lr, err);
    __put_user_error(regs->pc, &sf->uc.uc_mcontext.arm_pc, err);
    __put_user_error(regs->pstate, &sf->uc.uc_mcontext.arm_cpsr, err);

    __put_user_error((compat_ulong_t)0, &sf->uc.uc_mcontext.trap_no, err);
    /* set the compat FSR WnR */
    __put_user_error(!!(current->thread.fault_code & ESR_EL1_WRITE) <<
             FSR_WRITE_SHIFT, &sf->uc.uc_mcontext.error_code, err);
    __put_user_error(current->thread.fault_address,
&sf->uc.uc_mcontext.fault_address, err);
    __put_user_error(set->sig[0], &sf->uc.uc_mcontext.oldmask, err);

    err |= put_sigset_t(&sf->uc.uc_sigmask, set);

    aux = (struct compat_aux_sigframe __user *) sf->uc.uc_regspace;

    if (err == 0)
        err |= compat_preserve_vfp_context(&aux->vfp);
    __put_user_error(0, &aux->end_magic, err);

    return err;
}
--- snip ---

Regards

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