Alexandre Julliard : msvcrt: Fix floating-point status register size on ARM64.

[Alexandre Julliard]

Module: wine
Branch: master
Commit: 3bf2e5230afc36d071614a76641832ea8dd94146
URL:    https://source.winehq.org/git/wine.git/?a=commit;h=3bf2e5230afc36d071614a76641832ea8dd94146

Author: Alexandre Julliard <julliard at winehq.org>
Date:   Thu Nov 26 17:11:47 2020 +0100

msvcrt: Fix floating-point status register size on ARM64.

Signed-off-by: Alexandre Julliard <julliard at winehq.org>

---

 dlls/msvcrt/math.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/dlls/msvcrt/math.c b/dlls/msvcrt/math.c
index b975fd8d192..dd00cc212c6 100644
--- a/dlls/msvcrt/math.c
+++ b/dlls/msvcrt/math.c
@@ -1681,7 +1681,7 @@ unsigned int CDECL _statusfp(void)
     /* FIXME: there's no definition for ambiguous status, just return all status bits for now */
     flags = x86_sw | sse2_sw;
 #elif defined(__aarch64__)
-    unsigned long fpsr;
+    ULONG_PTR fpsr;
 
     __asm__ __volatile__( "mrs %0, fpsr" : "=r" (fpsr) );
     if (fpsr & 0x1)  flags |= MSVCRT__SW_INVALID;
@@ -1726,7 +1726,7 @@ unsigned int CDECL _clearfp(void)
         __asm__ __volatile__( "ldmxcsr %0" : : "m" (fpword) );
     }
 #elif defined(__aarch64__)
-    unsigned long fpsr;
+    ULONG_PTR fpsr;
 
     __asm__ __volatile__( "mrs %0, fpsr" : "=r" (fpsr) );
     if (fpsr & 0x1)  flags |= MSVCRT__SW_INVALID;
@@ -1991,7 +1991,7 @@ unsigned int CDECL _control87(unsigned int newval, unsigned int mask)
         __asm__ __volatile__( "ldmxcsr %0" :: "m" (fpword) );
     }
 #elif defined(__aarch64__)
-    unsigned long fpcr;
+    ULONG_PTR fpcr;
 
     __asm__ __volatile__( "mrs %0, fpcr" : "=r" (fpcr) );
     if (!(fpcr & 0x100))  flags |= MSVCRT__EM_INVALID;