Zebediah Figura : vkd3d-shader: Write SM1 addition instructions.

[Alexandre Julliard]

Module: vkd3d
Branch: master
Commit: dfaa3824605df43318a4bc3773a3dc55c1620647
URL:    https://source.winehq.org/git/vkd3d.git/?a=commit;h=dfaa3824605df43318a4bc3773a3dc55c1620647

Author: Zebediah Figura <zfigura at codeweavers.com>
Date:   Tue May 18 15:55:23 2021 -0500

vkd3d-shader: Write SM1 addition instructions.

Signed-off-by: Zebediah Figura <zfigura at codeweavers.com>
Signed-off-by: Matteo Bruni <mbruni at codeweavers.com>
Signed-off-by: Henri Verbeet <hverbeet at codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard at winehq.org>

---

 libs/vkd3d-shader/hlsl_codegen.c | 54 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/libs/vkd3d-shader/hlsl_codegen.c b/libs/vkd3d-shader/hlsl_codegen.c
index 5717314..166e5f5 100644
--- a/libs/vkd3d-shader/hlsl_codegen.c
+++ b/libs/vkd3d-shader/hlsl_codegen.c
@@ -1594,6 +1594,30 @@ static void write_sm1_instruction(struct hlsl_ctx *ctx, struct bytecode_buffer *
         write_sm1_src_register(buffer, &instr->srcs[i], instr->dst.writemask);
 };
 
+static void write_sm1_binary_op(struct hlsl_ctx *ctx, struct bytecode_buffer *buffer,
+        D3DSHADER_INSTRUCTION_OPCODE_TYPE opcode, const struct hlsl_reg *dst,
+        const struct hlsl_reg *src1, const struct hlsl_reg *src2)
+{
+    const struct sm1_instruction instr =
+    {
+        .opcode = opcode,
+
+        .dst.type = D3DSPR_TEMP,
+        .dst.writemask = dst->writemask,
+        .dst.reg = dst->id,
+        .has_dst = 1,
+
+        .srcs[0].type = D3DSPR_TEMP,
+        .srcs[0].swizzle = swizzle_from_writemask(src1->writemask),
+        .srcs[0].reg = src1->id,
+        .srcs[1].type = D3DSPR_TEMP,
+        .srcs[1].swizzle = swizzle_from_writemask(src2->writemask),
+        .srcs[1].reg = src2->id,
+        .src_count = 2,
+    };
+    write_sm1_instruction(ctx, buffer, &instr);
+}
+
 static void write_sm1_constant_defs(struct hlsl_ctx *ctx, struct bytecode_buffer *buffer)
 {
     unsigned int i, x;
@@ -1697,6 +1721,32 @@ static void write_sm1_constant(struct hlsl_ctx *ctx, struct bytecode_buffer *buf
     write_sm1_instruction(ctx, buffer, &sm1_instr);
 }
 
+static void write_sm1_expr(struct hlsl_ctx *ctx, struct bytecode_buffer *buffer, const struct hlsl_ir_node *instr)
+{
+    struct hlsl_ir_expr *expr = hlsl_ir_expr(instr);
+    struct hlsl_ir_node *arg1 = expr->operands[0].node;
+    struct hlsl_ir_node *arg2 = expr->operands[1].node;
+
+    assert(instr->reg.allocated);
+
+    if (instr->data_type->base_type != HLSL_TYPE_FLOAT)
+    {
+        FIXME("Non-float operations need to be lowered.\n");
+        return;
+    }
+
+    switch (expr->op)
+    {
+        case HLSL_IR_BINOP_ADD:
+            write_sm1_binary_op(ctx, buffer, D3DSIO_ADD, &instr->reg, &arg1->reg, &arg2->reg);
+            break;
+
+        default:
+            FIXME("Unhandled op %u.\n", expr->op);
+            break;
+    }
+}
+
 static void write_sm1_load(struct hlsl_ctx *ctx, struct bytecode_buffer *buffer, const struct hlsl_ir_node *instr)
 {
     const struct hlsl_ir_load *load = hlsl_ir_load(instr);
@@ -1831,6 +1881,10 @@ static void write_sm1_instructions(struct hlsl_ctx *ctx, struct bytecode_buffer
                 write_sm1_constant(ctx, buffer, instr);
                 break;
 
+            case HLSL_IR_EXPR:
+                write_sm1_expr(ctx, buffer, instr);
+                break;
+
             case HLSL_IR_LOAD:
                 write_sm1_load(ctx, buffer, instr);
                 break;