Stubbed additional VGA registers
Jeremiah Flerchinger
j.j.flerchinger at sbcglobal.net
Sat Dec 10 05:56:51 CST 2005
-------------- next part --------------
Subject: [PATCH] Stubbed additional VGA register functionality:
Modified "dlls/winedos/vga.c" with additional comments on VGA registers.
Added stubs for a large number of output registers and specific offsets.
---
dlls/winedos/vga.c | 418 +++++++++++++++++++++++++++++++++++++++++++++++-----
1 files changed, 379 insertions(+), 39 deletions(-)
754a4435ac517a77cc1e14ee025c26cb086ef56e
diff --git a/dlls/winedos/vga.c b/dlls/winedos/vga.c
index 9eb7447..cb7e866 100644
--- a/dlls/winedos/vga.c
+++ b/dlls/winedos/vga.c
@@ -1,7 +1,7 @@
/*
* VGA hardware emulation
*
- * Copyright 1998 Ove Kåven (with some help from Marcus Meissner)
+ * Copyright 1998 Ove K�en (with some help from Marcus Meissner)
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
@@ -1079,31 +1079,382 @@ static PALETTEENTRY paldat;
void VGA_ioport_out( WORD port, BYTE val )
{
- switch (port) {
- case 0x3c0:
- if (vga_address_3c0)
- vga_index_3c0 = val;
- else
- FIXME("Unsupported index, register 0x3c0: 0x%02x (value 0x%02x)\n",
- vga_index_3c0, val);
- vga_address_3c0 = !vga_address_3c0;
- break;
- case 0x3c4:
- vga_index_3c4 = val;
- break;
- case 0x3c5:
- switch(vga_index_3c4) {
- case 0x04: /* Sequencer: Memory Mode Register */
- if(vga_fb_depth == 8)
- VGA_SetWindowStart((val & 8) ? 0 : -1);
- else
- FIXME("Memory Mode Register not supported in this mode.\n");
- break;
- default:
- FIXME("Unsupported index, register 0x3c4: 0x%02x (value 0x%02x)\n",
+ switch (port)
+ {
+ /*
+ * General Registers
+ */
+ case 0x3c2: /* Miscellaneous output */
+ /*
+ * [7][6][5][4][3][2][1][0]
+ *
+ * [7] - vertical sync polarity
+ * [6] - horizontal sync polarity
+ * [5] - page bit for odd/even mode: 0=low, 1=high (for diagnostic use)
+ * [4] - 0 (RESERVED)
+ * [2][3] - clock select bits:
+ * 00=25.175 MHz clock VGA, 14 MHz EGA
+ * 01=28.322 MHz clock VGA, 16 MHz EGA
+ * 10=external clock selected
+ * 11=reserved
+ * [1] - RAM enable/disable: 0=video RAM disabled, 1=video RAM enabled
+ * [0] - I/O address select bit: 0=0x3b? (MDA compatable), 1=0x3d? (CGA compatible)
+ */
+ FIXME(":CRT_Controller_Register:Misc_output Unsupported VGA register: 0x%04x (value 0x%02x)\n", port, val);
+ break;
+ case 0x3ba: /* Feature Control - MDA compatible */
+ case 0x3da: /* Feature Control - CGA compatible */
+ FIXME(":CRT_Controller_Register:Feature_Control Unsupported VGA register: 0x%04x (value 0x%02x)\n", port, val);
+ break;
+ case 0x3c3: /* Video Subsystem enable */
+ FIXME(":CRT_Controller_Register:Video_Subsystem Unsupported VGA register: 0x%04x (value 0x%02x)\n", port, val);
+ break;
+ /*
+ * CRT Controller Registers
+ */
+ case 0x3b4: /* Offset Value Address - MDA compatible */
+ case 0x3d4: /* Offset Value Address - CGA compatible */
+ vga_index_3d4 = val;
+ break;
+ case 0x3b5: /* CRT Controller - MDA compatible */
+ case 0x3d5: /* CRT Controller - CGA compatible */
+ switch(vga_index_3d4)
+ {
+ case 0: /* Total horizontal chars minus 5 default and minus 2 in EGA compatability */
+ FIXME(":CRT_Controller_Register:Horiz_Chars Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 1: /* Horizontal display end characters minus 1 */
+ FIXME(":CRT_Controller_Register:Horiz_End Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 2: /* Start Horizontal Blanking */
+ FIXME(":CRT_Controller_Register:Horiz_Blank_Start Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 3: /* End Horizontal Blanking */
+ FIXME(":CRT_Controller_Register:Horiz_Blank_End Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 4: /* Start Horizontal retrace pulse */
+ FIXME(":CRT_Controller_Register:Horiz_Retrace_Start Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 5: /* Stop Horizontal retrace pulse */
+ FIXME(":CRT_Controller_Register:Horiz_Retrace_Stop Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 6: /* Total vertical scan lines */
+ FIXME(":CRT_Controller_Register:Vert_Lines Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 7: /* CRTC overflow */
+ FIXME(":CRT_Controller_Register:CRTC overflow Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 8: /* Preset row scan */
+ FIXME(":CRT_Controller_Register:Row_Scan Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 9: /* Maximum scan line */
+ FIXME(":CRT_Controller_Register:Max_Scan Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 10: /* Scan line for cursor start */
+ /*
+ * [7][6][5][4][3][2][1][0]
+ *
+ * [7] - Cursor ON/OFF Control: 1=cursor off, 0=cursor on
+ * [6][5] - Possibly 00 ?
+ * [4][3][2][1] - scan row for cursor start
+ */
+ FIXME(":CRT_Controller_Register:Cursor_Start Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 11: /* Scan line for cursor end */
+ /*
+ * [7][6][5][4][3][2][1][0]
+ *
+ * [7] - 0
+ * [6][5] - Cursor Skew Control: cursor is moved right 0 to 3 positions
+ * [4][3][2][1] - scan row for cursor end
+ */
+ FIXME(":CRT_Controller_Register:Cursor_End Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 12: /* Video buffer start address, high byte */
+ FIXME(":CRT_Controller_Register:Video_Buffer_High Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 13: /* Video buffer start address, low byte */
+ FIXME(":CRT_Controller_Register:Video_Buffer_Low Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 14: /* Cursor location, high-order byte of cursor address */
+ FIXME(":CRT_Controller_Register:Cursor_Pos_High Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 15: /* Cursor location, low-order byte of cursor address */
+ FIXME(":CRT_Controller_Register:Cursor_Pos_Low Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 16: /* Vertical retrace start */
+ FIXME(":CRT_Controller_Register:Vert_Retrace_Start Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 17: /* Vertical retrace end */
+ FIXME(":CRT_Controller_Register:Vert_Retrace_End Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 18: /* Last scan line of vertical display */
+ FIXME(":CRT_Controller_Register:Last_Vert_Scan Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 19: /* Additional word offset to next logical line */
+ FIXME(":CRT_Controller_Register:Next_Line_Offset Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 20: /* Scan line for underline character */
+ FIXME(":CRT_Controller_Register:Underline_Scan Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 21: /* Scan line to start vertical blanking */
+ FIXME(":CRT_Controller_Register:Vert_Blank_Scan_Start Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 22: /* Scan line to end vertical blanking */
+ FIXME(":CRT_Controller_Register:Vert_Blank_Scan_End Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 23: /* CRTC mode control */
+ FIXME(":CRT_Controller_Register:CRTC_Mode_Control Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ case 24: /* Line compare register */
+ FIXME(":CRT_Controller_Register:Line_Comp_Reg Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ break;
+ default:
+ FIXME(":CRT_Controller_Register Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3d4, val);
+ }
+ break;
+ /*
+ * Sequencer Registers
+ */
+ case 0x3c4: /* Offset Value Address */
+ vga_index_3c4 = val;
+ break;
+ case 0x3c5: /* Sequencer */
+ switch(vga_index_3c4)
+ {
+ case 0x00: /* Synchronous or Asynchronous reset */
+ FIXME(":Sequencer_Register:Reset Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3c4, val);
+ break;
+ case 0x01: /* Clocking Mode */
+ FIXME(":Sequencer_Register:Clocking_Mode Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3c4, val);
+ break;
+ case 0x02: /* Map Mask */
+ /*
+ * [7][6][5][4][3][2][1][0]
+ *
+ * [7][6][5][4] - 0000
+ * [3] - 1=map 3 enabled (intensity plane)
+ * [2] - 1=map 2 enabled (red plane)
+ * [1] - 1=map 1 enabled (green plane)
+ * [0] - 1=map 0 enabled (blue plane)
+ */
+ FIXME(":Sequencer_Register:Map_Mask Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3c4, val);
+ break;
+ case 0x03: /* Character Map Select */
+ /*
+ * [7][6][5][4][3][2][1][0]
+ *
+ * [7][6] - 00
+ * [5][3][2] - Map A Select: 000=map 0, 001=map 1, ... , 111=map 7
+ * [4][1][0] - Map A Select: 000=map 0, 001=map 1, ... , 111=map 7
+ */
+ FIXME(":Sequencer_Register:Map_Mask Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3c4, val);
+ break;
+ case 0x04: /* Sequencer: Memory Mode Register */
+ /*
+ * [7][6][5][4][3][2][1][0]
+ *
+ * [7][6][5][4] - 0000
+ * [3] - Access Mode Select:
+ * 1=enable bits 0 and 1 of the Char Map Select Register
+ * 0=enable sequential access of all maps (256-color modes only)
+ * [2] - Memory Addressing Mode Select:
+ * 1=sequential addressing mode
+ * 0=even addresses to maps 0 and 2
+ * odd addresses to maps 1 and 3
+ * [1] - extended memory status (always 1)
+ * [0] - 0
+ */
+ if(vga_fb_depth == 8)
+ VGA_SetWindowStart((val & 8) ? 0 : -1);
+ else
+ FIXME(":Sequencer_Register:Memory_Mode not supported in this mode.\n");
+ break;
+ default:
+ FIXME("Unsupported index, register 0x3c4: 0x%02x (value 0x%02x)\n",
vga_index_3c4, val);
- }
- break;
+ }
+ break;
+ /*
+ * Graphics Controller Registers
+ */
+ case 0x3ce: /* Offset Value Address */
+ vga_index_3ce = val;
+ break;
+ case 0x3cf: /* Graphics Controller */
+ switch(vga_index_3ce)
+ {
+ case 0x00: /* Set/Reset */
+ /*
+ * [7][6][5][4][3][2][1][0]
+ *
+ * [7][6][5][4] - 0000
+ * [3] - 1=reset map 3 (intensity plane)
+ * [2] - 1=reset map 2 (red plane)
+ * [1] - 1=reset map 1 (green plane)
+ * [0] - 1=reset map 0 (blue plane)
+ */
+ FIXME(":Sequencer_Register:Set_Reset Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3ce, val);
+ break;
+ case 0x01: /* Enable Set/Reset */
+ /*
+ * [7][6][5][4][3][2][1][0]
+ *
+ * [7][6][5][4] - 0000
+ * [3] - 1=enable map 3 (intensity plane)
+ * [2] - 1=enable map 2 (red plane)
+ * [1] - 1=enable map 1 (green plane)
+ * [0] - 1=enable map 0 (blue plane)
+ */
+ FIXME(":Sequencer_Register:Set_Reset_Enable Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3ce, val);
+ break;
+ case 0x02: /* Color compare for read mode 1 operation */
+ /*
+ * [7][6][5][4][3][2][1][0]
+ *
+ * [7][6][5][4] - 0000
+ * [3] - 1=enable map 3 (intensity plane)
+ * [2] - 1=enable map 2 (red plane)
+ * [1] - 1=enable map 1 (green plane)
+ * [0] - 1=enable map 0 (blue plane)
+ */
+ FIXME(":Sequencer_Register:Set_Reset Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3ce, val);
+ break;
+ case 0x03: /* Data rotate */
+ /*
+ * [7][6][5][4][3][2][1][0]
+ *
+ * [7][6][5] - 000
+ * [4][3] - Logical operation select:
+ * 00 = data unmodified
+ * 01 = data ANDed
+ * 10 = data ORed
+ * 11 = data XORed
+ * [2][1][0] - Rotate count: counter (0 to 7) of the positions to rotate CPU data during memory write operations
+ */
+ FIXME(":Sequencer_Register:Data_Rotate Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3ce, val);
+ break;
+ case 0x04: /* Read operation map select */
+ /*
+ * [7][6][5][4][3][2][1][0]
+ *
+ * [7][6][5][4][3][2] - 000000
+ * [1][0] - Select Map Operation
+ * 00 = select map 0
+ * 01 = select map 1
+ * 10 = select map 2
+ * 11 = select map 3
+ */
+ FIXME(":Sequencer_Register:Read_Map_Select Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3ce, val);
+ break;
+ case 0x05: /* Select graphics mode */
+ /*
+ * [7][6][5][4][3][2][1][0]
+ *
+ * [7] - 0
+ * [6] - VGA 256-color mode select: 1 = enable 256-color mode, 0 = bit 5 controls loading of shift register
+ * [5] - Shift Mode Selector: 1 = shift mode for mode 4 & 5 (CGA compatible), 0 = normal shift mode
+ * [4] - Select odd/even mode: 1 = odd/even mode (CGA compatible), 0 = normal mode
+ * [3] - Read type: 0 = read data from Read Map Select Reg, 1 = compare results w/maps in Color Compare Reg
+ * [2] - 0
+ * [1][0] - Write Mode Select:
+ * 00 = select write mode 0
+ * 01 = select write mode 1
+ * 10 = select write mode 2
+ * 11 = select write mode 3
+ */
+ FIXME(":Sequencer_Register:Graphics_Mode Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3ce, val);
+ break;
+ case 0x06: /* Miscellaneous operations - usually controlled by BIOS mode change */
+ /*
+ * [7][6][5][4][3][2][1][0]
+ *
+ * [7][6][5][4] - 0000
+ * [3]2] - Memory Map Select
+ * 00 = 128K bytes at 0xa0000 (VGA_WINDOW_START)
+ * 01 = 64K bytes at 0xa0000
+ * 10 = 32K bytes at 0xb0000
+ * 11 = 32K bytes at 0xb8000 (VGA_AlphaBuffer)
+ * [1] - Odd/Even chaining mode select
+ * 1 = chain odd maps after even maps
+ * 0 = normal map chaining
+ * [0] - 1=don't compare map 0 (blue plane)
+ */
+ FIXME(":Sequencer_Register:Misc_Ops Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3ce, val);
+ break;
+ case 0x07: /* Read mode 1 color don't care */
+ /*
+ * [7][6][5][4][3][2][1][0]
+ *
+ * [7][6][5][4] - 0000
+ * [3] - 1=don't compare map 3 (intensity plane)
+ * [2] - 1=don't compare map 2 (red plane)
+ * [1] - 1=don't compare map 1 (green plane)
+ * [0] - 1=don't compare map 0 (blue plane)
+ */
+ FIXME(":Sequencer_Register:Mode1_Color_NoCare Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3ce, val);
+ break;
+ case 0x08: /* Bit mask */
+ FIXME(":Sequencer_Register:Bit_Mask Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3ce, val);
+ break;
+ default:
+ FIXME(":Graphics_Controller_Register Unsupported index: register 0x%04x, index 0x%02x (value 0x%02x)\n",
+ port, vga_index_3ce, val);
+ }
+ break;
+ /*
+ * Attribute Controller Registers
+ */
+ case 0x3c0:
+ if (vga_address_3c0)
+ vga_index_3c0 = val;
+ else
+ FIXME("Unsupported index, register 0x3c0: 0x%02x (value 0x%02x)\n",
+ vga_index_3c0, val);
+ vga_address_3c0 = !vga_address_3c0;
+ break;
+ /*
+ * Additional Palette Registers?
+ */
case 0x3c8:
palreg=val; palcnt=0; break;
case 0x3c9:
@@ -1113,20 +1464,9 @@ void VGA_ioport_out( WORD port, BYTE val
palcnt=0;
}
break;
- case 0x3ce:
- vga_index_3ce = val;
- break;
- case 0x3cf:
- FIXME("Unsupported index, register 0x3ce: 0x%02x (value 0x%02x)\n",
- vga_index_3ce, val);
- break;
- case 0x3d4:
- vga_index_3d4 = val;
- break;
- case 0x3d5:
- FIXME("Unsupported index, register 0x3d4: 0x%02x (value 0x%02x)\n",
- vga_index_3d4, val);
- break;
+ /*
+ * Other Unsupported Registers
+ */
default:
FIXME("Unsupported VGA register: 0x%04x (value 0x%02x)\n", port, val);
}
--
0.99.9l
More information about the wine-patches
mailing list