[2/3] d3dx9: Check register type in dcl input instruction.

[Matteo Bruni]

-------------- next part --------------
From 0601ccd746f57ad3a79fdb431acbbb31b280e055 Mon Sep 17 00:00:00 2001
From: Matteo Bruni <matteo.mystral at gmail.com>
Date: Tue, 8 Jun 2010 03:21:43 +0200
Subject: d3dx9: Check register type in dcl input instruction.

---
 dlls/d3dx9_36/asmparser.c |    8 ++++++++
 dlls/d3dx9_36/tests/asm.c |    9 +++++++++
 2 files changed, 17 insertions(+), 0 deletions(-)

diff --git a/dlls/d3dx9_36/asmparser.c b/dlls/d3dx9_36/asmparser.c
index b20479a..528e6b3 100644
--- a/dlls/d3dx9_36/asmparser.c
+++ b/dlls/d3dx9_36/asmparser.c
@@ -118,6 +118,8 @@ static void asmparser_dcl_output(struct asm_parser *This, DWORD usage, DWORD num
 
 static void asmparser_dcl_input(struct asm_parser *This, DWORD usage, DWORD num,
                                 DWORD mod, const struct shader_reg *reg) {
+    struct instruction instr;
+
     if(!This->shader) return;
     if(mod != 0 &&
        (This->shader->version != BWRITERPS_VERSION(3, 0) ||
@@ -127,6 +129,12 @@ static void asmparser_dcl_input(struct asm_parser *This, DWORD usage, DWORD num,
         set_parse_status(This, PARSE_ERR);
         return;
     }
+
+    /* Check register type and modifiers */
+    instr.dstmod = mod;
+    instr.shift = 0;
+    This->funcs->dstreg(This, &instr, reg);
+
     if(!record_declaration(This->shader, usage, num, mod, FALSE, reg->regnum, reg->writemask, FALSE)) {
         ERR("Out of memory\n");
         set_parse_status(This, PARSE_ERR);
diff --git a/dlls/d3dx9_36/tests/asm.c b/dlls/d3dx9_36/tests/asm.c
index 5f2e49a..6255d02 100644
--- a/dlls/d3dx9_36/tests/asm.c
+++ b/dlls/d3dx9_36/tests/asm.c
@@ -1365,6 +1365,15 @@ static void failure_test(void) {
         /* shader 43: can't explicitely declare input registers in ps_2_0 */
         "ps_2_0\n"
         "dcl_texcoord0 t0\n",
+        /* shader 44: can't implicitely declare registers in vs */
+        "vs_2_0\n"
+        "dcl o0\n",
+        /* shader 45: can't implicitely declare samplers in vs */
+        "vs_3_0\n"
+        "dcl s2\n",
+        /* shader 46: no tx registers in ps_3_0 */
+        "ps_3_0\n"
+        "dcl t2\n",
     };
     HRESULT hr;
     unsigned int i;
-- 
1.6.4.4